In case you were thinking reset vector is somewhere at end of addressable memory.
Location of the reset vector is pretty weird, since at least Amiga got chip RAM over that region.
I guess there must be some special hardware that makes 68k read a different value from address 0x4 only momentarily after the system has been powered on.
"When a 68000 CPU powers up, it reads a few words at memory location zero to get the initial stack pointer and program counter. That suggests to me that a computer system designer would put the system ROM at memory location zero, where the 68000 would read the initial SP and PC when coming out of reset.
However the Amiga puts RAM at location zero, and the ROM at the very far end of the address space. It has a hardware switch which causes the system address decoding to place a second copy of the ROM at location zero, hiding the RAM. At reset, this hardware switch is "on", so the 68000 reads the initial SP and PC from this mirrored copy of the ROM and starts executing. Then the ROM firmware switches the hardware switch "off" to remove the mirrored ROM and reveal the RAM again."
In case you were thinking reset vector is somewhere at end of addressable memory.
Location of the reset vector is pretty weird, since at least Amiga got chip RAM over that region.
I guess there must be some special hardware that makes 68k read a different value from address 0x4 only momentarily after the system has been powered on.